| Erik Malund 06/25/09 06:37 Read: 134 times Mt Airy, Nc USA |
#166448 - one more thing, now we are digging deep Responding to: Jon Ledbetter's previous message |
if precision is required the required method is:
stop timer load timer with timer_values plus contant start timer if the timer value at the interrupt are not included, any other interrupt taking precedence will make the timing off Erik |
| Topic | Author | Date |
Pseudo timers make programming delays easy.  | Murray R. Van Luyn | 06/21/09 23:10 |
| volatile + racing condition | Per Westermark | 06/21/09 23:55 |
| slow processors | Per Westermark | 06/22/09 01:27 |
| You beat me to it... | Jez Smith | 06/22/09 01:50 |
| Timers_0.1 available. | Murray R. Van Luyn | 06/22/09 01:52 |
| SDCC | Jan Waclawek | 06/22/09 02:19 |
| ISR defining with SDCC | Mahesh Joshi | 06/22/09 02:42 |
| oh, I just read it in the manual | Jan Waclawek | 06/22/09 02:50 |
| only conditionally, as #ifdef SDCC | Andy Neil | 06/22/09 03:20 |
| SDCC and ISRs | Andy Peters | 06/23/09 14:17 |
| Prototyping ISRs | Andy Neil | 06/23/09 16:04 |
| you can see it as if.... | Jan Waclawek | 06/23/09 16:39 |
| SDCC Quirk? | Andy Neil | 06/23/09 16:56 |
internals of SDCC  | Maarten Brock | 07/08/09 14:31 |
| duh | Andy Peters | 06/24/09 14:49 |
| Too quick | Per Westermark | 06/22/09 02:38 |
| I see something else... | Jan Waclawek | 06/22/09 02:53 |
| That helped. | Murray R. Van Luyn | 06/22/09 22:33 |
| Oops! Timers_0.2 available. | Murray R. Van Luyn | 06/22/09 22:23 |
| you persist | Erik Malund | 06/23/09 07:25 |
| Good idea! | Andy Neil | 06/22/09 01:46 |
| atomicity | Erik Malund | 06/22/09 08:13 |
| No | Jez Smith | 06/23/09 08:40 |
| I gladly, click on a link .... | Erik Malund | 06/23/09 08:53 |
| Direct link | Jon Ledbetter | 06/23/09 10:54 |
| that was clearly possible, I wonder why ... | Erik Malund | 06/23/09 14:11 |
| one more thing, now we are digging deep | Erik Malund | 06/25/09 06:37 |